Quick answer
FPGA FIR-Filter | HLS | Kria KV260 | Pynq is an open source FPGA project from Hackster.io, indexed by ZouIC. Designing a fully pipelined and parallel FIR filter with float and fixed-point datatype. Using the Kria KV260 FPGA, HLS and Pynq.
- Source
- Hackster.io
- Focus
- FPGA
- Author
- Michael Schmid
- Published
- 2022-07-26
Common questions
What does FPGA FIR-Filter | HLS | Kria KV260 | Pynq do?
Designing a fully pipelined and parallel FIR filter with float and fixed-point datatype. Using the Kria KV260 FPGA, HLS and Pynq.
Where does FPGA FIR-Filter | HLS | Kria KV260 | Pynq come from?
ZouIC indexes it from Hackster.io, original page at https://www.hackster.io/michi_michi/fpga-fir-filter-hls-kria-kv260-pynq-2eec35.
What stack does FPGA FIR-Filter | HLS | Kria KV260 | Pynq use?
tags AMD Xilinx, tutorial, intermediate.
When was FPGA FIR-Filter | HLS | Kria KV260 | Pynq published?
The source page lists 2022-07-26.
Indexed by ZouIC from the source platform public page, for developer reference only. Copyright and licensing stay with the author; get code and files from the original platform.
FPGA FIR-Filter | HLS | Kria KV260 | Pynq
Published 2022-07-26
Designing a fully pipelined and parallel FIR filter with float and fixed-point datatype. Using the Kria KV260 FPGA, HLS and Pynq
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This content is sourced from Hackster.io Platform，All rights reserved by the original author. This platform only provides indexing and summaries. For detailed content, please visit the original link.