Quick answer
FPGA HW Acceleration Social Distancing Monitor is an open source FPGA project from Hackster.io, indexed by ZouIC. Social distance monitor using yolov3 and DPU acceleration on Ultra96v2.
- Source
- Hackster.io
- Focus
- FPGA
- Published
- 2020-11-29
Common questions
What does FPGA HW Acceleration Social Distancing Monitor do?
Social distance monitor using yolov3 and DPU acceleration on Ultra96v2.
Where does FPGA HW Acceleration Social Distancing Monitor come from?
ZouIC indexes it from Hackster.io, original page at https://www.hackster.io/liuyibo0514/fpga-hw-acceleration-social-distancing-monitor-01918c.
What stack does FPGA HW Acceleration Social Distancing Monitor use?
tags AMD Xilinx, tutorial, intermediate.
When was FPGA HW Acceleration Social Distancing Monitor published?
The source page lists 2020-11-29.
Indexed by ZouIC from the source platform public page, for developer reference only. Copyright and licensing stay with the author; get code and files from the original platform.
FPGA HW Acceleration Social Distancing Monitor
Published 2020-11-29
Social distance monitor using yolov3 and DPU acceleration on Ultra96v2
Technical Specifications
Related resources and purchase links
Statistics
Similar Hardware Projects
Project Info
Author Info
Related Links
Keep exploring
Citation Note
This content is sourced from Hackster.io Platform，All rights reserved by the original author. This platform only provides indexing and summaries. For detailed content, please visit the original link.