Quick answer
Machine Learning with Ultra96, DPU IP (3.0) and DNNDK is an open source FPGA project from Hackster.io, indexed by ZouIC. This tutorial is on how to create DPU (3.0) TRD for Ultra96 board, how to setup the DNNDK and test with Resnet50 & Yolo application on it.
- Source
- Hackster.io
- Focus
- FPGA
- Author
- LogicTronix [FPGA Design + Machine Learning Company]
- Published
- 2020-05-07
Common questions
What does Machine Learning with Ultra96, DPU IP (3.0) and DNNDK do?
This tutorial is on how to create DPU (3.0) TRD for Ultra96 board, how to setup the DNNDK and test with Resnet50 & Yolo application on it.
Where does Machine Learning with Ultra96, DPU IP (3.0) and DNNDK come from?
ZouIC indexes it from Hackster.io, original page at https://www.hackster.io/LogicTronix/machine-learning-with-ultra96-dpu-ip-3-0-and-dnndk-ef9278.
What stack does Machine Learning with Ultra96, DPU IP (3.0) and DNNDK use?
tags AMD Xilinx, protip, beginner.
When was Machine Learning with Ultra96, DPU IP (3.0) and DNNDK published?
The source page lists 2020-05-07.
Indexed by ZouIC from the source platform public page, for developer reference only. Copyright and licensing stay with the author; get code and files from the original platform.
Machine Learning with Ultra96, DPU IP (3.0) and DNNDK
Published 2020-05-07
This tutorial is on how to create DPU (3.0) TRD for Ultra96 board, how to setup the DNNDK and test with Resnet50 & Yolo application on it.
Technical Specifications
Related resources and purchase links
Statistics
Similar Hardware Projects
Project Info
Author Info
Related Links
Keep exploring
Citation Note
This content is sourced from Hackster.io Platform，All rights reserved by the original author. This platform only provides indexing and summaries. For detailed content, please visit the original link.