CURATED OPEN HARDWARE

All board projects

Quality open-source board projects and technical materials from CrowdSupply, Hackaday, and Hackster.io, all in one place

For developer reference only: ZouIC indexes these projects and hosts no code or files. Copyright and licensing stay with their authors under each project license. Open Source Licenses
GPIO Control on AUP ZU3 with PetaLinux 2022.1
Hackster.io fpga

GPIO Control on AUP ZU3 with PetaLinux 2022.1

Build a PetaLinux 2022.1 image for the Zynq UltraScale+ AUP ZU3 and control an LED from Linux via sysfs GPIO

intermediate
AMD Xilinxprotipintermediate
Part 2:A power system for SOC - Created by vibe circuiting
Hackster.io General Board

Part 2:A power system for SOC - Created by vibe circuiting

Created a power supply system for SOC

beginner
AMD Xilinxshowcasebeginner
Running PYNQ 4.0 on the snickerdoodle black and piSmasher
Hackster.io fpga

Running PYNQ 4.0 on the snickerdoodle black and piSmasher

AMD's PYNQ 4.0 (Ubuntu 24.04) to a Zynq-7000 board it no longer supports, and a hardware calculator demo to prove the FPGA path works

advanced
AMD Xilinxtutorialadvanced
Bringing up an IMX219 video pipeline on AMD Kria KV260
Hackster.io fpga

Bringing up an IMX219 video pipeline on AMD Kria KV260

This project walks through how to bring up an IMX219 video pipeline on an AMD Kria KV260 board.

intermediate
AMD Xilinxtutorialintermediate
A Robot and Brain for Klask
Hackster.io Robotics

A Robot and Brain for Klask

An autonomous, CoreXY-driven retrofit robot that transforms a standard Klask board into an AI-powered physical opponent using MuJoCo-trained

intermediate
Intelwipintermediate
Custom Linux driver on Zynq-7000
Hackster.io fpga

Custom Linux driver on Zynq-7000

Writing a custom driver for an IP step by step starting from nothing and ending with interrupt handling support in the driver.

intermediate
AMD Xilinxtutorialintermediate
Fractions in FPGA
Hackster.io fpga

Fractions in FPGA

Compare fixed and floating point on FPGA using a MATLAB-to-RTL IIR filter, and learn to choose Q formats and handle truncation.

intermediate
AMD Xilinxshowcaseintermediate
MorphSense:FPGA-based Reconfigurable Sensor Network over SPE
Hackster.io fpga

MorphSense:FPGA-based Reconfigurable Sensor Network over SPE

Reconfigurable sensor network; Deploy once, reprogram remotely. FPGA orchestrates any sensing mode over Single Pair Ethernet.

AMD Xilinx
Chirp Waveform Generator Using Vitis Model Composer for FPGA
Hackster.io fpga

Chirp Waveform Generator Using Vitis Model Composer for FPGA

From chirp equation to a parameterized FPGA architecture that generates complex I/Q waveforms by changing only bandwidth and pulse width.

intermediate
AMD Xilinxtutorialintermediate
EcoFence Q: An AI-Powered Virtual Boundary for Human-Wildlif
Hackster.io Machine Vision

EcoFence Q: An AI-Powered Virtual Boundary for Human-Wildlif

EcoFence Q: An AI-powered solar virtual fence on Arduino UNO Q & App Lab using Edge Vision & LoRa to prevent human-wildlife conflict.

advanced
AMD Xilinxtutorialadvanced
vtpgZero: Portable Open-Source Video TPG for FPGA
Hackster.io fpga

vtpgZero: Portable Open-Source Video TPG for FPGA

10 test patterns, moving box, SMPTE bars and a image overlay, in plain Verilog. Output: AXI4-Stream, FVAL/LVAL

intermediate
AMD Xilinxtutorialintermediate
InferPerf: PMU‑Driven AI Inference Profiler for Arm CPUs
Hackster.io AI Hardware

InferPerf: PMU‑Driven AI Inference Profiler for Arm CPUs

Profiler that reveals AI inference bottlenecks on Arm Cortex‑A CPUs using PMU counters, flamegraphs, and microarchitectural analysis.

intermediate
AMD Xilinxtutorialintermediate
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