All board projects
Quality open-source board projects and technical materials from CrowdSupply, Hackaday, and Hackster.io, all in one place
IRIS - COVID19 Fighting Bot
A voice controlled robot that can pick up the things, switch on the lights, scan temperature of a person without any physical contact.

Robotics 0ver Internet
A robotic arm that can be controlled over the Internet. Not sure why that would be useful, but it should be fun! Join us!

Smart Venetian Blinds
IoT project using Intel Edison, SmartLiving, sensors and actuators

Export Arduino Create Project To Intel® System Studio 2018
Enhance IoT device and application performance, optimize power efficiency, and speed time-to-market with this cross-platform tool suite.
Automated Pickpocketing Detection System
We have a plan to developed a smart vision based solution for detecting the pickpocketing automatically from surveillance video camera.

Innovation: Unleashing the Power of Robot Arms and 3D Camera
Empower learning and explore the future with our user-friendly Robotic Arm and Depth Camera Kit, mastering 3D camera technology.
IA Agricultural monitoring system
Agricultural monitoring system with AI for the automation of processes, capacity for prevention and detection of pests and diseases.
NCO Simulation in Vivado with FCW, Phase Accumulator, and LUT
Numerically Controlled Oscillator (NCO) Simulation in Vivado: Frequency control word, Phase Accumulator and Block Memory (LUT)

BuzzTrain - Augmenting Communication with Your Dog
BuzzTrain is a smart dog collar that allows pet owners to remotely monitor their dogs and their environment.
Networking with the Ultra96: Port Forwarding
Access your Ultra96 from the world outside of your Wi-Fi network by using port forwarding.
PYNQ-Z2 Music Visualizer
An FPGA-based real-time audio spectrum visualizer built on the PYNQ-Z2 development board.
FSM-Based Traffic Light Controller using Verilog (Vivado Sim
This project demonstrates the design and simulation of a traffic light controller using a Finite State Machine (FSM) in Verilog HDL. The sys
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