CURATED OPEN HARDWARE

All board projects

Quality open-source board projects and technical materials from CrowdSupply, Hackaday, and Hackster.io, all in one place

For developer reference only: ZouIC indexes these projects and hosts no code or files. Copyright and licensing stay with their authors under each project license. Open Source Licenses
DSP for FPGA: Using Xilinx DDS with Custom FIR
Hackster.io fpga

DSP for FPGA: Using Xilinx DDS with Custom FIR

See how to integrate your custom FIR with Xilinx DSP IP such as their DDS Compiler IP.

intermediate
AMD Xilinxtutorialintermediate
Vitis-AI 1.1 Flow for Avnet VITIS Platforms - Part 2
Hackster.io fpga

Vitis-AI 1.1 Flow for Avnet VITIS Platforms - Part 2

This guide provides detailed instructions for targeting the VART samples from the Xilinx Vitis-AI 1.1 flow for Avnet Vitis 2019.2 platforms

intermediate
AMD Xilinxtutorialintermediate
Pet Feeder
Hackster.io General Board

Pet Feeder

Have you even forgotten to feed yout pet? Things can happen... But not anymore! From now on PetFeeder will buzz, blink and message you!

intermediate
Intelshowcaseintermediate
Enabling 10G Ethernet on the Xilinx KR260
Hackster.io fpga

Enabling 10G Ethernet on the Xilinx KR260

This tutorial shows you how to setup a 10G SFP+ interface in a Vivado and Petalinux project for the KR260 Kria dev-kit.

intermediate
AMD Xilinxtutorialintermediate
OpenAMP in Xilinx MPSoC FPGA- Running Petalinux & Baremetal
Hackster.io fpga

OpenAMP in Xilinx MPSoC FPGA- Running Petalinux & Baremetal

This tutorial is on using OpenAMP framework for running multiple boot system on single MPSoC FPGA, as Petalinux on APU and Baremetal on RPU.

intermediate
AMD Xilinxtutorialintermediate
Embedded Linux on MicroBlaze
Hackster.io fpga

Embedded Linux on MicroBlaze

How to create and leverage embedded Linux in small FPGAs using MicroBlaze

intermediate
AMD Xilinxtutorialintermediate
Logging sensor data using Intel Edison and Python
Hackster.io General Board

Logging sensor data using Intel Edison and Python

Grab sensor data from your Intel Edison without the need of the Arduino IDE, using the Mraa Python library

beginner
Inteltutorialbeginner
AXI4-Lite Interface Wrapper for Custom RTL in Vivado 2021.2
Hackster.io fpga

AXI4-Lite Interface Wrapper for Custom RTL in Vivado 2021.2

This project demonstrates how to take a custom RTL module and add an AXI4-Lite interface wrapper to it for use in the Vivado block design.

intermediate
AMD Xilinxtutorialintermediate
Introducing Xilinx Kria™ for Vision AI Applications
Hackster.io fpga

Introducing Xilinx Kria™ for Vision AI Applications

Xilinx just announced Kria™, their newest product portfolio. This project takes a sneak peek at the adaptive and production ready SOM.

beginner
AMD Xilinxprotipbeginner
Kria-KR260 Petalinux 2022.2 - GPIO Tutorial
Hackster.io fpga

Kria-KR260 Petalinux 2022.2 - GPIO Tutorial

Petalinux 2022.2 GPIO project for KR260, Kria Robotics Board.

intermediate
AMD Xilinxtutorialintermediate
Add Peripheral Support to Kria KR260 Vivado 2022.1 Project
Hackster.io fpga

Add Peripheral Support to Kria KR260 Vivado 2022.1 Project

This project walks through the details of adding the hooks for the hardware on the KR260 carrier board in a Vivado 2022.1 project.

intermediate
AMD Xilinxtutorialintermediate
IoT@School: An IoT Implementation for Monitoring Air Quality
Hackster.io IoT

IoT@School: An IoT Implementation for Monitoring Air Quality

A classroom, in winter times is ill ventilated leading to poor air quality causing fatigue, headaches and in some instances nausea.

intermediate
Intelshowcaseintermediate
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