CURATED OPEN HARDWARE

All board projects

Quality open-source board projects and technical materials from CrowdSupply, Hackaday, and Hackster.io, all in one place

For developer reference only: ZouIC indexes these projects and hosts no code or files. Copyright and licensing stay with their authors under each project license. Open Source Licenses
Accelerated App Development on Kria KD240 in Vitis 2023.2
Hackster.io fpga

Accelerated App Development on Kria KD240 in Vitis 2023.2

This project walks through the base workflow for accelerated application development on the Kria KD240 in Vitis Unified 2023.2

advanced
AMD Xilinxtutorialadvanced
Fixed Platform Design on Zynq-7000 in PetaLinux 2024.1
Hackster.io fpga

Fixed Platform Design on Zynq-7000 in PetaLinux 2024.1

This project walks through how to create an embedded Linux image for the ARM-core in the Zynq-7000 using PetaLinux 2024.1

beginner
AMD Xilinxprotipbeginner
Debugging HDL with ILAs in Vivado & Vitis 2023.2
Hackster.io fpga

Debugging HDL with ILAs in Vivado & Vitis 2023.2

This project walks through how to setup the Vivado & Vitis projects for debugging using integrated logic analyzers in HDL in verison 2023.2.

intermediate
AMD Xilinxprotipintermediate
Garden Monitoring System Using AI
Hackster.io AI Hardware

Garden Monitoring System Using AI

AI-driven system using AMD tech monitors plants, optimizes care, and automates maintenance for efficient, sustainable gardening.

intermediate
AMD Xilinxtutorialintermediate
Telegram Bot with Intel Edison
Hackster.io General Board

Telegram Bot with Intel Edison

An application that communicates with a bot from telegram with the edison to get access to inputs and outputs from the edison.

intermediate
Intelprotipintermediate
ADPLL Design for Transceiver
Hackster.io fpga

ADPLL Design for Transceiver

This project aims to create transmission line between two links using FPGA cards and solve the synchronization problems with ADPLL.

advanced
AMD Xilinxprotipadvanced
Vitis 2023.2 AXI4-Lite Slave Custom RTL
Hackster.io fpga

Vitis 2023.2 AXI4-Lite Slave Custom RTL

Creating custom RTL IP in PL and connecting this RTL code to PS via AXI4-Lite so we can send data from Zynq processor to FPGA logic

intermediate
AMD Xilinxprotipintermediate
ADAS Reference Design with Xilinx MPSoC-EV
Hackster.io fpga

ADAS Reference Design with Xilinx MPSoC-EV

This tutorial is on "detailing the vivado and petalinux design flow" of ADAS system design for automotive application.

intermediate
AMD Xilinxshowcaseintermediate
TINA: Running non NN algorithms on an AMD Ryzen NPU!
Hackster.io AI Hardware

TINA: Running non NN algorithms on an AMD Ryzen NPU!

TINA allows you to run your non-NN operations e.g. matrix multiplication or if statements using any hardware that supports neural networks.

intermediate
AMD Xilinxwipintermediate
SelfieCam
Hackster.io Machine Vision

SelfieCam

Travel the world and take pictures as proof of your journeys by just sitting back at home and posing with the Intel RealSense Camera.

intermediate
Intelshowcaseintermediate
Radiation Effects Demonstrator in FPGA
Hackster.io fpga

Radiation Effects Demonstrator in FPGA

In Space no one can hear your FPGA scream. High Reliability FPGA design teaching aid

intermediate
AMD Xilinxtutorialintermediate
Integrating Alexa & Ultra96
Hackster.io fpga

Integrating Alexa & Ultra96

Voice control using Alexa is popular for a number of applications. This project shows how to connect an Ultra96 (Arm & FPGA) with Alexa.

intermediate
AMD Xilinxtutorialintermediate
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