Hackster.io
Open source hardware projects indexed by ZouIC from public pages of this platform. For developer reference only; copyright and licensing stay with their authors.

Virtual IOT_BootCamp Prep
How to begin: sign up, pay, wait for hardware, gather info and do prep work. Microsoft, Hackster and Raspberry Pi IoT Virtual Bootcamp.
Lemmings Game using Verilog and FPGA
Developing Lemmings Game using Verilog and simulating it using FPGA.
HapticCV: SpatialAI & Haptic Stimulus Based Cycle Assistance
HapticCV - SpatialAI based Computer Vision for revolutionizing Bicycle Commute with Haptic Stimulus, an algorithm at a time.
FPGA Implementation of Image K-Means Clustering Algorithm
The implemented image segment uses K-Mean clustering algorithm for FPGA Devices, and it has been designed with a standard Xilinx AXI4 stream
Air Quality Sensing With Ultra96V2
Logging CO2 and TVOC to the cloud using the Ultra96 and PYNQ.
Getting Started with Intel's OpenVINO SDK
Explore Intel's OpenVINO platform by seeing how to set it up and run an example project.
Object Detection(Yolo) with DPU-PYNQ and KR260
This project is part of a subproject for the AMD Pervasive AI Developer Contest. We are conducting tests with DPU-PYNQ on KR260.
Vitis Hardware In the Loop
How to run Vitis Sub Systems on Hardware in the loop using Vitis.
Digitizing Signals with XADC on ZYBO Z7-20
Using XADC on ZYBO Z7-20 to digitize function generator signals, transfer via DMA, and plotting in MATLAB.
Gesture Control of Smart Home Devices with Xilinx KV260
Compile a pretrained PyTorch model to run on a Xilinx Kria KV260 to perform gesture recognition from a USB webcam to control a FireTV stick.
Building the Ultra96-V2 PYNQ Base Overlay
A step-by-step guide on how to build the PYNQ base overlay for the Ultra96-V2.
PYNQ and Ultra96 Pulse Oximeter
Implementing a pulse oximeter using PYNQ and the Click HR4 sensor.
4 Channel TDC (Time Digital Converter) on Cmod A7 35T
Implement a 4-channel TDC on Cmod A7 35 using MicroBlaze and SRAM with 30ps rms and measurement rate of 60MSa/s
Edge Impulse on Kria KV260: Basic ML Model Development
This project walks through the basics of creating your own ML model in Edge Impulse & deploying it on the Kria KV260.
Debugging Accelerated Apps using Emulation in Vitis 2021.2
This project walks through how to set up a generic project in Vitis 2021.2 to debug FPGA accelerated applications using SW & HW emulation.
FPGA IP Core Generation with Vitis Model Composer
This tutorial shows how to generate FPGA IP cores using Vitis Model Composer, from modeling to deployment—step by step.
LAMP-FPGA: Accelerating Time Series Similarity Prediction
Predicting similar patterns in time series data on Ultra96-V2 FPGA board
PhiGent Heimdallr
This project implemented a CNN-based stereo application on KV26 SOM boards.

Walabot Target Visualization in WebVR
Using Intel Compute Stick & Walabot, host a website to visualize Walabot sensor data in VR. Create NodeJS bindings for Walabot.

AWS Agro Automation System
Intelligent measure to monitor and protect the agricultural lands
Self-driving Car Based on Learning from Vision Demonstration
A model car driven by KV260 and a USB camera mounted on the front.
Eclypse Z7 + Digitizer Zmod Software Design in Vitis 2022.1
This project continues with the bare metal application in Vitis for using the Digitizer Zmod on the Eclypse Z7 in a custom design.
PetaLinux on Snickerdoodle Black + piSmasher Baseboard
A walkthrough of bringing up a basic embedded Linux image in PetaLinux 2019.2 for the Snickerdoodle Black with piSmasher baseboard.

ASMAv2 with OpenVINO
An autonomous drone that uses deep learning to identify if people are maintaining social distancing or not. High Degree of Red = High Risk.
Designing a Custom Carrier Board for AMD Kria™ SOMs Part 2
This project walks through the steps of how I designed my own custom carrier board for the AMD Kria™ K24 SOM.
ROS 2 Humble Hawksbill with Yocto and PetaLinux
Yocto and ROS 2 allow you to build a production-grade custom operating system for robots. How to get ROS 2 Humble into Yocto and PetaLinux?

Distress System for Elderly
Automating a distress signal in the case of an emergency
Digital Clock in HLS
The goal of this project is to demonstrate the capability of HLS in designing a digital clock system.

Save the Water Pipes!
Our project is a freezing water pipe detection and prevention system.
U96-SVM - Stereo Vision Front-end for Ultra96-V2
Open-licensed hardware that gives Ultra96-V2 dual MIPI CSI and USB video class interfaces to realize a stereo vision system.
KRIA KV260-ATROVER (mini)
The KRIA KV260-ATROVER (AuTonomous ROVER) mini version - the first prototype of an autonomous self-driver rover with PYNQ
Dual-Camera Video Pipeline on AUBoard with RPi Camera FMC
Build a dual-camera video pipeline on the AUBoard using the RPi Camera FMC. Capture, process and mix two 1080p streams into one HDMI display

Stepper Motor Controller in High-Level Synthesis
The goal of this mini-project is to drive a 4-phase bipolar stepper motor using high-level synthesis for FPGA.
Concept to Prototype U96: Part Three
The final part of the project demonstrates how we create image processing pipeline in Petalinux and create a Vitis Acceleration Platform.
PMOD IP for Kria KV260 using Vivado/VitisHLS/Petalinux2022.1
This project demonstrates how to control the PMOD IO on the KV260 carrier board running Petalinux 2023.1 & develop IP for it using VitisHLS.

Floating-Point Numbers on 7-Segment Display in HLS
This mini-project shows how to display a floating-point number on 7-segments using C/C++ HLS.
Designing a Custom Carrier Board for AMD Kria™ SOMs Part 1
This project walks through the steps of how I designed my own custom carrier board for the AMD Kria™ K24 SOM.
Mezzanine Board for Ultra96 "96AnalogXperience"
Many times we need from the FPGA some signals for use it as stimulus for other circuits. This board brings us 4 analog outputs for Ultra96.
Getting Started with the TE0711
See how to get the TE0711 SoM running on the TE0701 baseboard from Trenz Electronic.
PYNQ and IOP on Ultra96 Breakout
Implementing PYNQ overlay with an IOP for the Ultra96 Break Out
UART VHDL Implementation on FPGA with Host Data Exchange
Implement a UART communication protocol using VHDL on an FPGA development board, and data exchange with Python Serial Terminal
Zynqberry Zero Hardware Design in Vivado 2022.1
This project walks through the hardware design for the ZynqberryZero in Vivado 2022.1 to be able to use Raspberry Pi accessories with it.

Should Dan Water His Plants?
Dan's summer house has plants he likes to water, using a MiniZed we can monitor humidity and temperature to determine if they need watering.
ZYBO Z7 20 Webcam on the Petalinux
The Zybo Z7-20 board, integrated with PetaLinux, supports real-time embedded vision appications using the Pcam 5C webcam.

No Touchy
My first run with the Edison: an antisocial little project that just wants to be left alone.
TE0726 Zynqberry Hardware Design in Vivado 2022.1
This project walks through how to create a basic hardware design for the Zynqberry in Vivado 2022.1 to be compatible with Raspberry Pi pHATs

LED Patterns on the Arty S7 FPGA board
Use VHDL to make some cool patterns with the 4 LEDs on Digilent's Arty S7-25 FPGA board
Zynq XADC tutorial, Part 2: The HW design
Tutorial on how to use Xilinx Zynq-7000 XADC. Part 2 of 3 explains how to do the HW design in AMD Xilinx Vivado.

INCE - Intelligent Cat Entrance
A cat door, combined with a camera based identification system.
Getting Started with the Kria KD240 in PetaLinux 2023.2
This project walks through how to create a Linux OS for the Kria KD240 Drives Kit in PetaLinux 2023.2

Traffic Segmentation using Xilinx Vitis-AI
A real time Shibuya Crossing (Tokyo) traffic segmentation demo using Xilinx Zynq UltraScale+ MPSoC development board (Ultra96V2).

PYNQ-Z2 HDMI Usage - 4: Video Processing Seamless Switch
This post adds a toggle for the Sobel filter, ensuring the screen remains stable with no blackout.
OpenVino and Neural Stick 2 in a Companion Robot
This is a companion robot capable of analyzing heart signals, using artificial intelligence and OpenVino.

BBM: Bridge Baby Monitor for Predictive Maintainence
Ultra96 FPGA-based platform to predict structural failure to cut costs of maintenance and also prevent disasters.
8085 homebrew computer
A custom pc based on 8085 with custom assembler and EEPROM programmer.
Empowering DUNE: A Guide to Starting with KRIA KR260, Vivado
In this tutorial, we provide the steps to create and configurate a first PL-PS project using KRIA KR260, Vivado 2022.2 and Petalinux 2022.2
Send data from modbus sensor XY-MD02 to nodeRED with balena
The modbus RTU sensor XY-MD02 can be easily installed using a RS485 connection through a serial port to send temperature and humidity.
共 1303 个项目,第 11 / 22 页
All projects come from public pages of this platform. ZouIC indexes them and hosts no code or files; they are for developer reference only, under each project own license.


