Hackster.io
Open source hardware projects indexed by ZouIC from public pages of this platform. For developer reference only; copyright and licensing stay with their authors.
RISC-V Soft Processor System on DE10-Lite
Build a Nios V RISC-V system in Quartus on the DE10-Lite, run Hello World.
Custom DPU-PYNQ Overlay for the Sundance VCS³ Board
Extends the DPU-PYNQ framework with a custom accelerated platform, generating the required FPGA overlay binaries and a matching arch. json.
SCUTTLE Frame on Frame Design for 100kg Payload AMR (PRL 7)
Scaling existing SCUTTLE to carry 100kg payload with a frame-on-frame design concept. This is an on-going co-development with customer.
CG34 - The Companion Bot
An AI Companion robot controlled by an Arduino Uno, and your laptop.
Vivado project for PS development with Zynq MPSoC
Base Vivado project to configure the PS on the MYIR MYD-CZU3EG development board as a base for software and Linux development
Evaluating Tool Awareness of LLMs for Robotics Control
This article implements a strategy to evaluate agentic AI ROS2 nodes for robotic control.
AI Based Traffic Control System
Our innovative system aims to transform toll collection on highways by integrating an automated number plate recognition (ANPR) solution.
KR 260 camera Environment setup
Tired of worrying about campus safety or missing classes? We've got you covered! Our smart camera system is like having a superhero watch
Near Real-Time Face-reIdentification Surveillance System
Altering person card entry and manual tracking system to AI enabled solution using Xilinx Vitis-ai on VCK5000.
Tria Vitis Platforms - Adding support for ROS2
This project describes how to add support for ROS2 to the Tria Vitis Platforms.
DPU Vivado + Petalinux flow 2025.2
Creating the dpu block design and getting to running on petalinux 2025.2
ILA Debugging on Artix- 7 FPGA
Debugging a basic binary counter IP from Xilinx-AMD on EDGE-Artix-A7 FPGA.
04 Minimal Linux System from AMD Petalinux on TE0950 Board
In this example we building a basic linux system for the Trenz TE0950 board
AdaptoPharm: An Adaptive Pharmacy Inventory System
This guide provides detailed steps on using Xilinx Vitis AI with Pynq and Python to create an inventory management system on the Ultra96-V2.
BCD to Decimal Decoder Using Only Nand Gates
A project where the input is a 4-bit binary number, and the output is the equivalent 2-digit decimal number, using only NAND gates.
Design of a Test System for Polar Codes from DDC
This project has implemented UART receiver, transmitter, and flexible Polar Encoder.
AXI Lite PWM Fan Control
This project implements an AXI Lite interface to control the speed of a fan using the a pwm module.
RGB to Grayscale with HW on Zynq
Two methods to convert RGB to Grayscale & Accuracy of the methods
16 Simulate AI Engine graphs from Python
In this article we will see how we can use the Vitis Functional Simulation feature to simulate a Versal AI Engine application from Python
Silencing the Noise Precisely: NPU AI for Cancer Screening
A solution to enhance cancer screening accuracy and efficiency by leveraging the power of AMD Ryzen AI PCs with NPUs.
Gated Linear Networks (GLN) based lossless image compression
Our goal is to make medical data storage systems more efficient by introducing high compression ratio lossless image compression.
07 Introduction to AMD AI Engine Programming
In this article we are having an introduction on AI Engine programming by analysing an example code
2 classic AI on edge IoT camera connectivity solutions
Deploy your edge ai IoT camera system based on raspberry pi and intel VPU
Porting a Bilinear Interpolation design on AI Engine-ML
This project describes how it is possible to modify an existing code created for AIE to target AI Engine-ML device
GenOps Platform for End-to-End Generative AI using AMD GPUs
A GenOps Generative AI platform on Kubernetes using Open Source Kubeflow to run Generative AI workflows using the AMD Radeon Pro W7900 GPU
PwFPGAs - Part 4 - CL vs SL with Vivado on Artix-7 FPGA
Prototyping with FPGAs - Part 4 - Combinational Logic vs. Sequential Logic with Vivado on Artix-7 FPGA
10 Improving AMD AI Engine graph latency and throughput
In this tutorial, we are looking at some ways to improve the latency and throughput of our AI Engine application.
Design and Verification of High Throughput Hamming Decoder
High Throughput decoder capable of producing an output on every input, designed using time division multiplexing of 2 Meggitt decoders.
Trash Transformer: Recycle and Earn Instantly
"Turn waste into rewards! Our reverse vending machine gives you instant rewards on giving waste. Save the planet, earn rewards!"
Dual-Frequency Sine Generator with LUT and ILA Debugging
Implement a sine wave generator on a ZCU104 board using block memory as a lookup table and clocking wizard, result demonstration with ILA
Kria™️ KR260 - "Unifying the communication stack" II
Get started with the KRIA KR260 development kit for Robotic applications. "Kria adaptable Robotics II – Unifying the communication protocol"
AI powered Surveillance Robot
Street violence's detection and Detecting suspicious peoples carrying weapons.
360 Live Streaming + Object Detect(DPU) with KR260
This project is part of a subproject for the AMD Pervasive AI Developer Contest. We process 360° Object Detect(DPU) with KR260.
HoloFusion:Fusing Realities
Share virtual experiences in real time through Holoportation
Spectrum Analyzer on a Zybo Z710 FPGA
An audio spectrum analyzer with waterfall display implemented on the Zybo Z7-10 FPGA.
Text to speech for people with low vision (disability)
Text to speech device that can help people with low vision to read
Multibit PWM IP Core Using VHDL
A multi-bit-ouptut pwm core developed in vhdl can be integrated to any softcore microprocessor system
PHiLIP: Personalized Human in Loop Image Production
AI-powered image generation & enhancement suite: Create, customize & transform images with cutting-edge ML models.
Live Concert Improvement System from Digilent Design Contest
Design an add-on module for analog mixers that can be used to control some of the signal parameters.
Super96s Cluster - Part 1
Creating a series of modules allowing you to connect for the first time a PYNQ acceleration distribution network for edge devices U96.
Deep Learning on the MYD-CZU3EG - Vivado flow (part 1)
Tutorial on the creation of a Vivado project to use the DPU (Deep Learning Processor Unit) on the XCZU3EG in the MYIR MYID-CZU3EG board.
HacksterMate: Offline AI Assistant for Makers
HacksterMate is an offline AI assistant utilizing the Llama 2 model on an AMD IPU to aid makers with building projects.
SWEEP ‘n’ PLAY from Digilent Design Contest
The SWEEP'n'PLAY console offers a new way of playing thanks to its smartphone.
Edge-Based Trail Camera Video Processing
An energy efficient object detector deployed with trail cameras to summarize video content into for future satellite transmission.
FreeRTOS LED Control: KR260 APU-RPU IPI Communication
Real-time LED control on KR260 using FreeRTOS RPU with 4 APU communication modes: independent timer, shared memory, IPI with ACK, and kernel
![[RTL Design] SPI Controller for AD7303 DAC Peripheral](https://hackster.imgix.net/uploads/attachments/1805942/_XKnASon5X5.blob?auto=compress%2Cformat)
[RTL Design] SPI Controller for AD7303 DAC Peripheral
RTL design walkthrough for SPI Master controller to talk to AD7303 8-bit DAC peripheral.
MicroBlaze MCS Seven-Segment Counter on Basys 3 FPGA
Implementing a Soft-Core Processor with GPIO-Driven Display on Artix-7.
SensoGPT: A Remote Sensing Large Language Model
SensoGPT is an innovative solution that integrates LLM with AI-based remote sensing models to automate complex interpretation tasks.
Vitis HLS: Matched Filter implementation
Time and frequency domain implementation of fully pipelined Matched Filter IP core in Vitis HLS
KD240 BIST - Platform/App Recreating with 2025.1 Vitis & HLS
Re-creating the KD240 BIST application with 2025.1.
Redirection to Tinkercad projects
This is the first project on hackster so instead of making a project with instructions this links to several projects on Tinkercad.
Test Pattern Generator + VDMA on Vivado and Petalinux 2025.2
This project creates a simple block design utilizing a Test Pattern Generator and an vdma on Vivado+Petalinux 2025.2 using Ultra96v2
safevote
Project created with computer vision technology to minimize in political elections the spread of the COVID-19 disease that shook the world
COVID-19 Sniper: An advanced diagnostic tool for pneumonia
YOLO V2-VOC-Tiny was run on the KV260 development board to identify and localize COVID-19 infections and lung lesions on radiographs.
Real-Time Weather Expert
This project will attempt to use real-time sensor data to predict weather phenomenon such as fog using the Kria KV260.
AI Safety Monitor with FPGA + Zephyr RTOS
Monitoring AI Inference (DPU) on AMD Kria KV260 with Zephyr RTOS for Functional Safety.
Object classifier conveyor system
T is ros2 humble gazebo classic simulation project in which there is a conveyor belt on which objects are classified based on aruco markers.
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