Hackster.io

Running Yolov2-tiny on KV260

This project shows how to run yolov2tiny on KV260 using the smart camera application provided by Xilinx.

FPGA Processor Expansion Module

A modular solution to expand processor capabilities using FPGA and high-speed ADC integration

4K TPG Video Streaming in Kria KV260 [Baremetal] - Part 1

Let's learn how to implement a standalone 4K Video Pipeline in Kria KV260 Vision AI Starter Kit

Mini But Mighty, the MiniZed and Vitis for Motor Control

How to use the MiniZed with the Vitis embedded flow for motor control applications.

Ultra96 Facial Recognition Deadbolt Using PYNQ

The title says it all! This project uses OpenCV and a convolutional neural network in PYNQ on an Ultra96 V2 to create a smart lock.

Avnet Ultra96-V2 Face Detection Tutorial

Complete an exciting face detection application within an hour on Ultra96-V2 SBC based on Xilinx Zynq UltraScale+ MPSoC.

Ping Pong Game on DE-10 FPGA Board

This game is written with in Verilog HDL. It implements VGA 640x480 resolution on the monitor using the Intel DE-10 Lite FPGA Board.

Perfecting PCIe with AUBoard

Lets get a PCIe Interface up and running with the AUBoard

Autonomous System for Locating People Under Dredges

The purpose of this project is to create a radio map of the disaster area using reception devices placed near the affected area.

24-Bit Stereo Audio DAC for Raspberry Pi

24-bit stereo DAC which is specially built for Raspberry Pis. This R-2R DAC delivers the clear audio output with minimum configuration.

How to Install PetaLinux using a Virtual Machine

How to create your own PetaLinux using a Virtual Machine

Vision Outside the Visible!!!

The ability to see across multiple elements of the EM spectrum, e.g. visible IR, provides significant benefits. Let's look how we can do it.

FPGA Based Astronomy

Attempting to capture NeoWise and other interesting planets.

Facemask Detector

FPGA-based system that monitors facemask use through artificial intelligence, includes a thermometer and facemask dispenser.

Supercharge Your ZUBoard with the Hailo-8 AI Accelerator

Supercharge Your ZUBoard: Unleasing Unprecedented Performance with the Hailo-8 AI Accelerator.

Ultra96 FPGA-Accelerated Parallel N-Particle Gravity Sim

Demonstrating the scientific computational power of the small ZU3EG SoC by using 8 parallel floating point accelerators running at 200 MHz.

Python & PYNQ on the Snickerdoodle!

The Snickerdoodle is an SoC, with processors and programmable logic. Let's look at how we can accelerate Python with PYNQ on it!

Ethernet Packet Inspection

Local area network traffic analyzer with parallel string matching.

FFT IP Core Tutorial: Vivado Simulation with Complex Numbers

How to configure, and validate a FFT IP core in Vivado using various test signals

Interfacing with AXI Peripherals in RTL

This project demonstrates how to interface with an AXI GPIO peripheral located in RTL vs in the block design in Vivado v2021.2

ROS 2 in Kria kv260 with Petalinux 2021.2

This tutorial is on how to install ROS 2 in a Petalinux 2021.2 image and launch minimal publisher/subscriber examples.

ArtyBot

A two-wheel robotics platform built on the Arty development board.

Quadcopter using Intel Galileo and Android App

Getting Started with the TE0802

A guide for getting a TE0802 Zynq UltraScale+ MPSoC development board up and running with Vivado/Vitis 2019.2.

Weather Station & FPGA Device Talking via the IOTA Network

This is a demonstration on how a service such as a group of weather stations can influence the decisions of devices via the IOTA network.

Kria-DPU-TRD-VIVADO Flow (Vitis AI 2.0) Tutorial

This tutorial is DPU TRD based in VIVADO flow, we are using Vitis AI 2.0 along with VIVADO 2021.1 and Petalinux 2021.1

Getting Started with SP701 in Vivado 2021.2

See how to create a base hardware design for the Spartan-7 SP701 FPGA development platform in Vivado v2021.2

Let's make a smartwatch with AWS IoT

Intel Edison is small enough to use as a wearable, so why not we make a smart watch with Edison and powerful AWS IoT.

voicechat2: Local AI Voice Chat

A fast AI voicechat system that runs entirely locally (SRT/LLM/TTS) via WebSockets. Compatible with AMD GPUs.

Live Camera Feed Webpage on the Ultra96

View a live webcam feed via a webpage implemented on the Ultra96v2.

FPGA-Based Intelligent Engine Control Unit

An intelligent way to increase fuel efficiency for Engine Control Unit by using FPGA.

Benchmarking the Kria KV260 AI Vision Starter Kit

This project demonstrates the Kria SoM's performance benchmarks and how to validate them.

ZUBoard - Building the foundational designs

Avnet provides pre-verified designs for its platforms. This project describes how to re-generate the ZUBoard designs from source.

Debugging AMD FPGA AXI designs with a RPi Pico

FPGA design use AXI networks, this can be a complex protocol to work with. Lets look at how you can access AXI using a UART and RPi PICO

Real-Time Face Recognition on Ultra96-V2

Leverage Vitis-AI 1.3 to implement real-time face recognition on the Ultra96-V2 development board.

Rapid Prototyping Vitis HLS IP Designs using Pynq

Pynq is a handy tool for rapid prototyping of your IP designs done in Vitis HLS, so this project is a quick demo of that cycle.

Zynqberry U-Boot Configuration in PetaLinux

This project walks through how to integrate the required u-boot environment variables for the Zynqberry boards into a PetaLinux project.

Wi-Fi Connectivity on the Ultra96-V2 in Vivado+PetaLinux 201

Bring up the Ultra96 V2 in Vivado+PetaLinux 2019.2 with Wi-Fi connectivity.

Creating a Vitis-AI GStreamer Plugin for the Ultra96-V2

GStreamer is a popular framework for implementing video pipelines in Linux. This project shows how to create a custom AI plugin.

Object Detection using OAK-D with Custom Dataset

This project is to showcase object detection using OAK-D, which is trained in SSD-MobileNet-V2 model with custom dataset.

Real Digital Signal Processing

Signal processing with the real digital black board

Understanding FIR Filters with PYNQ

Filters are a key element of FPGA based solutions lets look at how we can create a FIR filter and interact with it in PYNQ!

Kria KV260 Petalinux 2023.1 Project Build & Config- Tutorial

This tutorial is on creating Petalinux project with BSP of 2023.1 version for Kria KV260 and configuring it to generate the WIC Image.

agriHoverGames – a smart drone that solves farmers' problems

An intelligent system that can analyze the health of different cultures.

Realtime Fare Evasion Detection From Video Using Openvino

Automated realtime fare evasion detection system can help save million of dollars for transit authorities !

Mango Plant Disease Detection

It helps in classifying the diseases of mango leaves for our Mango Farm in India using Tensorflow and OpenVino in Drones

Edge Impulse on Xilinx Zynq

Deploying Tiny machine learning at the edge, on Xilinx Zynq Devices.

Sign Language Letter Translator

A smart glove that translates sign language letters into written letters with monitor.

Hello Versal!

In this project we are going to walk step by step through our first Versal Project building hardware and adding in elements to the NoC

PI-car

Personalized driving experience on shared rides

PYNQ for Kria KV260

PYNQ installation and configuration for Kria KV260 SOM embedded system.

Avnet Ultra96 and OnSemi Dual MIPI Camera

Examining the new OnSemi Dual MIPI Camera Mezzanine for the Ultra96.

Rescue Bot

Rescue Bot is an autonomous ground rover designed to navigate post-disaster terrain, locate survivors and enhance disaster response

Signal Analysis with the Cora Z7 & Octave

FPGAs / SoCs are great for signal processing. Let's take a look at how we can implement a test platform for experimentation.

KRIA kv260 petalinux bsp

Overview of kv260 petalinux BSP 2021.1 as a starting point for design and customizations

CMOS Sensor Camera System

Optical inspection using OV7670 and Nexys Video.

Object detection using FPGA LIDAR

In this project we will connect a LIDAR to a FPGA.

Accelerating the MediaPipe models with Hailo-8

An exploration of accelerating the MediaPipe models with Hailo-8

Vitis Acceleration Flow on KV260 - Extensible Vitis Platform

Using Vitis for FPGA acceleration, this first part goes through how to create the hardware design with the hooks for the accelerated kernel.

Getting Started with the Kria KD240 in Vivado 2023.2

This project walks through how to create a hardware design including all board peripherals for the Kria KD240 Drives Kit in Vivado 2023.2