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Getting Started with the Arty Z7 in Vivado 2023.2
Hackster.io

Getting Started with the Arty Z7 in Vivado 2023.2

This project walks through how to build a hardware design for the Zynq-based Arty Z7 FPGA development board.

Signal Transmission and Reception Using ADRV9009 + ZCU102
Hackster.io

Signal Transmission and Reception Using ADRV9009 + ZCU102

This project is a step by step tutorial to transmit and receive signal using ADRV9009(WPCBZ) + ZCU102 (Eval Board)

Basic Hardware Design for Arty A7 in Vivado 2022.1
Hackster.io

Basic Hardware Design for Arty A7 in Vivado 2022.1

This project walks through how to create a basic hardware design for bare metal applications using Vivado 2022.1

Microblaze RISC-V & Zynq7 PS using Vivado / Unified Vitis
Hackster.io

Microblaze RISC-V & Zynq7 PS using Vivado / Unified Vitis

Implementation of Microblaze RISC-V with Zynq7 PS on Zedboard using Vivado / Unified Vitis IDE 2024.2

BNN-PYNQ: Baking a custom BNN for the Zybo-Z7
Hackster.io

BNN-PYNQ: Baking a custom BNN for the Zybo-Z7

Training and synthesizing a BNN for a very small Zynq SoC.

Designing PCBs for the Kria KV260 on the Kria KV260
Hackster.io

Designing PCBs for the Kria KV260 on the Kria KV260

I installed various EE design applications on the Ubuntu 22.04 desktop image of my KV260 including KiCad, and laid out a custom PCB with it.

K26 eMMC linux image programming with kr260 carrier card
Hackster.io

K26 eMMC linux image programming with kr260 carrier card

Process to program Xilinx KRIA K26 production SOM non-volatile memory with Xilinx KRIA KR260 starter kit carrier card

Introducing ZUBoard for Accelerated Edge AI
Hackster.io

Introducing ZUBoard for Accelerated Edge AI

In early June Avnet announced the ZUBoard, featuring the ZUB1CG, the smallest device in the AMD-Xilinx Zynq UltraScale+ MPSoC family.

Yolov3 Pytorch Quantization, Compilation, and Inference
Hackster.io

Yolov3 Pytorch Quantization, Compilation, and Inference

Tutorial on Quantizing Yolov3 Pytorch, Compiling it and running inference on Kria KV260 or MPSoC Board with Vitis AI 3.0.

Optimising MicroBlaze Designs
Hackster.io

Optimising MicroBlaze Designs

SW running on our MicroBlaze might be slower than we want, lets examine how to make it MUCH Faster!

Vitis 2023.2 Blink LED
Hackster.io

Vitis 2023.2 Blink LED

Blink LED for new Vitis - Eclipse Theia-base

IoT Ultra96 Temperature Monitor Using IFTTT
Hackster.io

IoT Ultra96 Temperature Monitor Using IFTTT

IoT is a hot topic for Ultra96 developers. This project shows how to connect to IoT infrastructure and integrate with IFTTT.

Fun with FuseSoC
Hackster.io

Fun with FuseSoC

Building FPGA designs with FuseSoC to enable rapid retargeting of code between AMD FPGAs

MIPI Imaging with the Spartan Edge Accelerator Board
Hackster.io

MIPI Imaging with the Spartan Edge Accelerator Board

Creating a minimal MIPI imaging system on a Spartan XC7S15 device with no processors.

ZedBoard FMC HDMI Sobel Tutorial
Hackster.io

ZedBoard FMC HDMI Sobel Tutorial

This reference tutorial shows the details and steps for "interfacing Avnet-FMC-HDMI converter with ZedBoard and implementing Sobel HLS IP".

ZCU104_MPSoC Development - Petalinux 2024.2 Basic Tutorial
Hackster.io

ZCU104_MPSoC Development - Petalinux 2024.2 Basic Tutorial

Deploy PetaLinux 2024.2 on ZCU104 with setup, boot, and custom apps for advanced embedded system development.

4K at 60Hz? Not a Problem with the AUBoard
Hackster.io

4K at 60Hz? Not a Problem with the AUBoard

We’ve built a high-performance HDMI 2.0 pass-through system that supports 4K at 60Hz using the AMD Artix™ UltraScale+™ FPGA on the AUBoard

PYNQ ZU Imaging
Hackster.io

PYNQ ZU Imaging

Creating a MIPI Imaging platform in PYNQ we can use to explore the Vitis Vision Libraries.

Fun with Fractals
Hackster.io

Fun with Fractals

Fractals are great patterns to recreate in FPGA. Let's look at what they are and how to implement them.

Linux on MicroBlaze: ArtyA7 Hardware Design in Vivado 2022.1
Hackster.io

Linux on MicroBlaze: ArtyA7 Hardware Design in Vivado 2022.1

This project walks details the hardware design in Vivado required to run an embedded Linux image on the Arty A7.

Use Tensil and PYNQ to run ResNet-20 on PYNQ Z1 FPGA board
Hackster.io

Use Tensil and PYNQ to run ResNet-20 on PYNQ Z1 FPGA board

Show how to use Tensil’s open-source accelerator and Xilinx PYNQ to run ResNet-20 model on PYNQ Z1 development board.

Getting Started with the MiniZed
Hackster.io

Getting Started with the MiniZed

See how to get your next project running on the MiniZed with a base hardware design in Vivado and a baremetal application using Vitis.

RFSoC 4x2 Quick Start to Hardware Acceleration
Hackster.io

RFSoC 4x2 Quick Start to Hardware Acceleration

The following tutorial demonstrates how to quickly get a project up and running on the Xilinx RFSoC 4x2 FPGA board using the PYNQ framework.

Eclypse Z7 + Digitizer Zmod Hardware Design in Vivado 2022.1
Hackster.io

Eclypse Z7 + Digitizer Zmod Hardware Design in Vivado 2022.1

This project walks through how to create a custom hardware design in Vivado 2022.1 for the Eclypse Z7 with the new Digitizer Zmod.

Vision Beyond the Visible with PYNQ
Hackster.io

Vision Beyond the Visible with PYNQ

Creating a thermal imaging overlay for the PYNQ Z2.

FPGA FIR-Filter | HLS | Kria KV260 | Pynq
Hackster.io

FPGA FIR-Filter | HLS | Kria KV260 | Pynq

Designing a fully pipelined and parallel FIR filter with float and fixed-point datatype. Using the Kria KV260 FPGA, HLS and Pynq

Getting Started with Eclypse Z7 + AWG Zmod in Vivado 2022.1
Hackster.io

Getting Started with Eclypse Z7 + AWG Zmod in Vivado 2022.1

This project walks through how to create a base design on the Eclypse Z7 to use the AWG Zmod in custom projects.

AXI GPIO, Memory-Mapped I/O MMIO, Read/Write Using C Pointer
Hackster.io

AXI GPIO, Memory-Mapped I/O MMIO, Read/Write Using C Pointer

Using AXI GPIO blocks for LED control and DIP switch input in Vivado use memory-mapped I/O with C pointers to access peripherals in Vitis

Vivado HLS Compilation Flow: From Software to Hardware
Hackster.io

Vivado HLS Compilation Flow: From Software to Hardware

Learn how to compile your C / C++ / OpenCL into a hardware accelerator.

Ubuntu 20.04.3 Desktop on Kria KV260 with Edge Impulse
Hackster.io

Ubuntu 20.04.3 Desktop on Kria KV260 with Edge Impulse

This project walks through installing Ubuntu 20.04.3 Desktop on the Kria KV260 Vision AI Starter Kit and using Edge Impulse with it.

KV260 Temperature Controlled Cooling Fan
Hackster.io

KV260 Temperature Controlled Cooling Fan

Quality of life upgrade for your KV260 board

Vitis-AI pytorch design example on the Kria KV260
Hackster.io

Vitis-AI pytorch design example on the Kria KV260

Detailed walk-through of setting up the Vitis-AI pytorch example on the Kria KV260, while showcasing some errors and bugs on the way.

Accelerating Your Ultra96 Developments!
Hackster.io

Accelerating Your Ultra96 Developments!

Learn how to use SDSoC to accelerate functions from the processors to the logic in the Ultra96!

Matrix Voice & PYNQ
Hackster.io

Matrix Voice & PYNQ

How to get the PYNQ and Matrix Voice to work with each other.

Minized 2020.1 Getting started + PYNQ
Hackster.io

Minized 2020.1 Getting started + PYNQ

A little guide how to create petalinux project, with PYNQ and XRT support on Minized, with startup scripts.

AC701, HDMI & Test Pattern Generation
Hackster.io

AC701, HDMI & Test Pattern Generation

How to work with Analogue Devices ADV7511 on Xilinx Development boards.

DPU TRD for Ultra96
Hackster.io

DPU TRD for Ultra96

We have build the DPU TRD for Ultra96 FPGA as the "DPU Integration Tutorial - GitHub, Xilinx."

Ultra96 Powered TurtleBot3 Burger
Hackster.io

Ultra96 Powered TurtleBot3 Burger

As seen at the 2019 XDFs, Avnet added the Ultra96 to the TurtleBot3 Burger to accelerate Robot Operating System and SLAM.

Tutorial: TFT SPI display on Xilinx Zynq SoC
Hackster.io

Tutorial: TFT SPI display on Xilinx Zynq SoC

This step-by-step tutorial describes how to use a TFT SPI display on the AMD Xilinx Zynq-7000 SoC platform.

Running Embedded Lua on a Digilent Arty FPGA Board
Hackster.io

Running Embedded Lua on a Digilent Arty FPGA Board

This project combines eLua with an open source RISC-V CPU core to a powerful, self-hosted embedded platform for FPGAs.

Zynq XADC tutorial, Part 1: The concepts
Hackster.io

Zynq XADC tutorial, Part 1: The concepts

Tutorial on how to use Xilinx Zynq-7000 XADC. Part 1 of 3 explains the XADC's concepts and provides practical examples.

Multiprocessing on Xilinx MPSoC
Hackster.io

Multiprocessing on Xilinx MPSoC

Run different applications on separate processors concurrently whilst sharing data.

Software Defined Radio on FPGA from Digilent Design Contest
Hackster.io

Software Defined Radio on FPGA from Digilent Design Contest

With this project, we want to create a new platform for communication.

Home Automation with PYNQ and Zigbee
Hackster.io

Home Automation with PYNQ and Zigbee

Creating a simple and expandable home automation system with PYNQ and Zigbee

Getting Started with PYNQ and the ZUBoard
Hackster.io

Getting Started with PYNQ and the ZUBoard

How to get started developing with the ZUBoard and PYNQ

PYNQ-Z2 HDMI Usage - 1: TPG Output
Hackster.io

PYNQ-Z2 HDMI Usage - 1: TPG Output

PYNQ-Z2's HDMI offers TPG for test patterns and passthrough for direct video. In this tutorial, we demonstrate TPG output functionality.

AI at the Edge: Xen Hypervisor on the ZCU102
Hackster.io

AI at the Edge: Xen Hypervisor on the ZCU102

Learn how to set up and boot multiple OS's on the ZCU102 using the Xen hypervisor.

Kria ROS2 and TurtleBot3 Waffle
Hackster.io

Kria ROS2 and TurtleBot3 Waffle

Using ROS2 on a Kria KV260 - opens the path to acceleration of ROS2

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