Karp
This is Karp, (Kria Autonomous Robotic Platform) built for 2021 Adaptive Computing Challenge using Kria kv260 Xilinx/AMD board.
Creating a Digital Menu Using FPGAs
This project shows how an FPGA can be used for creating a digital menu accessible via a webpage over Wi-Fi with a QR code.
DPU 3.0 TRD for ZCU104 & Petalinux Desktop-GUI Tutorial
This ML acceleration tutorial is on how to create a DPU TRD in Xilinx VIVADO design tool and how to configure Petalinux for Desktop-GUI.
Kria KR260 Petalinux 2024.2 SDT flow project build
This tutorial details the steps needed for building Petalinux 2024.2 with SDT flow.
Getting Started with KRS & ROS 2 on the Kria KV260
This project walks through how to build & launch a ROS 2 package with KRS on your host PC and on target hardware.
Setup Kria KV260 to access Remote Desktop
In this project, I show how to connect KV260 using remote desktop
Generating an Embedded Linux Image for the ZynqberryZero
This project walks through how to generate an embedded Linux image with the Yocto-based PetaLinux tools from Xilinx for the ZynqberryZero.
Running Linux on the TE0802
This project walks through how to create a base Linux image for the TE0802 Zynq UltraScale+ MPSoC development board.
Design of a Test System for Polar Codes in FPGA
We design a flexible, remote-controlled test system for polar codes in FPGA.
Kria Robotic Starter Kit - Robotic Arm
How to create a Robotic Arm under the control of the new Kria Robotic Starter Kit
This will be your new favourite CPU for FPGAs!
In this project, we will be exploring the open-source, FPGA-friendly VexRiscV CPU Core and test it using Coremark on the Nexys A7.
Independent Custom RTL Designs on Kria KR260
This project walks through how to deploy RTL designs in the programmable logic running independent of the Linux userspace on the KR260.
Pi OS for Zynqberry: Adafruit RFM69 Radio with CircuitPython
Adapting Adafruit's CircuitPython to use the RFM69HCW Radio FeatherWing on the Zynq-7000 series FPGAs.
AMD-Xilinx Vivado/Vitis HLS Y2k22 Patch Application Guide
Applying the y2k22 patch for HLS in my system took a few extra steps outlined in this post.
Petalinux 2020.2 BSP for Ultra96v2 with Wifi & VNC Server
This tutorial consists Petalinux 2020.2 BSP for the Ultra96v2 FPGA board & BSP also includes wifi, so you can use it for DPU based designs.
Creation of Vitis Platform with WiFi for Ultra96V2
For use with Ultra96, it must be created from the Vitis platform. Based on GitHub data, we created Ultra96's Vitis platform.
Vitis AI 3.5 with Petalinux 2024.2
Enabling Vitis AI 3.5 and DPU in Petalinux 2024.2 for AI/ML acceleration for Kria/MPSoC/Versal.
ZUBoard - Adding support for Vitis-AI 3.0
This project describes how to add support for Vitis-AI 3.0 to the ZUBoard.
AMD FPGA Tools 2025.1/2025.2 Install on Ubuntu 24.04
This project walks through the process and caveats of installing the 2025 versions of Vivado, Vitis, & PetaLinux on Ubuntu 24.04 LTS.
Ultra96V2 Breakout for Pmod & SYZYGY
Designing a breakout board for SYZYGY and Pmod to connect and work with the Ultra96.
Xilinx KV260 - Vitis-AI 1.4 Face Detection
Create a Face Detection Script for Vitis-AI 1.4 Kria
PYNQ-Z2 HDMI Usage - 2: HDMI Passthrough
On PYNQ-Z2, HDMI displays via TPG and supports rx/tx passthrough. See article 1 for TPG details; this article covers passthrough.
Tutorial: MicroBlaze with DDR3 SDRAM
Step-by-step guide for FPGA HW design of MicroBlaze Soft Processor using DDR3 SDRAM.
Pi OS for Zynqberry Using PetaLinux 2019.2
Take advantage of the Zynqberry by taking the first step of porting your Raspberry Pi projects over to the Zynq platform.
Fabric GSM Determination Using Ultra96 + PYNQ
Yarn count and grams per square meter determination using a magnified image of fabric and PYNQ computer vision and BNN overlays.
DPU 3.0 TRD for ZCU104
We have developed and test the DPU TRD for ZCU104. This TRD have used the DPU IP version 3.0, the design have 1 core DPU & softmax function.
AMD MicroBlaze™ V Processor Health and Usage Monitoring
A small FPGA combined with the AMD MicroBlaze™ V processor can be used to create HUMS to monitor the environmental effects on the systems.
GNU Radio Toolkit on AXU2CGB Zynq UltraScale+ board - Part1
This project walks through how to create a Vitis 2021.2 hardware accelerator platform with GNU Radio Toolkit for AXU2CGB board made by Alinx
Deephi DNNDK Tutorial for Ultra96
Install the "desktop stretch" on the Ultra96, building and running the DNNDK sample project on Ultra96. Learn about enabling WiFi and VNC.
Eclypse-Z7 PYNQ porting guide
A tutorial how to port Eclypse-Z7 to PYNQ, some IP synthesis and led blinking.
Accelerated Edge AI with Vitis-AI
This guide provides detailed instructions for targeting the Xilinx Vitis-AI 2.5 flow for Avnet Vitis 2022.1 platforms.
Ultra96 SDR Part One: Simple RF Spectrogram Web Application
Take advantage of the Ultra96 by adding your own web applications.
Precision Analog Measurement
How to use FPGA based XADC to give you a precision measurement which can be used for many applications.
Checkout So Easy - Real-time Smart Retail System For FPGA
Deploy an object detection model on DPU to build a system which can show detected commodities in VCU decoded video or images from camera.
TheFifthDriver: Machine learning driving assistance on FPGA
FPGA implementation of a highly efficient real-time machine learning driving assistance application using a camera circuit.
UART Transmit with HLS for FPGA
This project implements a UART transmit logic design in HLS.
Marker-Based Augmented Reality on Ultra96-V2
Explore augmented reality on Ultra96-V2 by adding computer generated graphics to the live USB camera video stream.
FPGA Based Pizza Slice Angle Calculator
Use an Ultra96V2 Board, a Yolov3 neuronal network running on a Xilinx DPU to calculate the perfect pizza cutting angle based on the toppings
Genesys ZU Vitis Accleration Platform
How to create a Genesys ZU Vitis acceleration platform.
Vitis Acceleration Flow on KV260 - Software in PetaLinux
Using Vitis for FPGA acceleration, this second part covers how to add the accelerated kernel to the embedded Linux image in PetaLinux.
Getting Started with the Arty Z7 in PetaLinux 2023.2
This project walks through how to create a basic Linux image for the Arty Z7 using PetaLinux 2023.2.
Edge Computing- KV260 Vision AI Starter Kit
The Xilinx® Kria KV260 Vision AI Starter Kit is the premier platform to evaluate your Vision AI-based applications.
Ultra96-V2 - Building the foundational designs
Avnet provides pre-verified designs for its platforms. This project describes how to re-generate the Ultra96-V2 designs from source.
Empowering DUNE: AXI Quad SPI using Petalinux 2022.2 in KRIA
In this tutorial, we provide the steps to create the hardware design to support the AXI Quad SPI IP and interact with SPI in Petalinux.
OpenAMP on KRIA kv260
KRIA kv260 comes with 2 ARM R5 processors which can offload time critical tasks from linux with openAMP example is available in plnx BSP
Digital clock (time watch) using FPGA
Digital clock (time) on 4 single 7 segment common anode display implemented hardware on Xilinx Spartan 6 FPGA.
FPGA Plant Model powerSUITE Buck/Boost Real Time
Allows quick evaluation of Power Supply Plant parameters for TI Buck_VMC_F2837xS project.
DeepSeek On the ZUBoard
An engaging project that deploys the smallest DeepSeek model on the AMD Zynq™ UltraScale+™ MPSoC Processing System.
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