Empowering DUNE: A Guide to Starting with KRIA KR260, Vivado
In this tutorial, we provide the steps to create and configurate a first PL-PS project using KRIA KR260, Vivado 2022.2 and Petalinux 2022.2
Speech controlled robot with Tensil and Arty A7 - Part 2
Learn how to build a speech controlled robot with Tensil, Digilent Arty A7 FPGA board and Pololu Romi chassis.
Edge Impulse on Kria KR260
This project walks through how to install Edge Impulse on the Ubuntu 22.04 image of the Kria KR260 and the development of a basic ML model.
Vitis HLS: Direct Digital Synthesizer implementation
Implementation of fully pipelined DDS IP cores in Vitis HLS with truncated, dithered phase and Taylor serial output correction
Kria Kitchen ML Lifeguard
Smart device that monitors unattended kitchen cooking appliances using computer vision with Machine Learning.
VHDL Testing Platform
Easy to use Platform to learn VHDL. Running on a ZYBO over the web.
KRIA™️ KR260 - "The right engine for the right task"
Get started with the KRIA KR260 development kit for Robotic applications. Building the platform and partitioning the system.
Agriculture crop disease detection using ML & Kria KV260
To combat loss due to disease in crops, a machine learning based system with edge AI which detects disease can aid farmers for higher yield.
PYNQ-Z2 HDMI Usage - 3: Using Sobel Filter with HDMI
This time, we are adding the HLS Sobel filter IP to the HDMI Passthrough to achieve real-time image processing.
Use Tensil and PYNQ to run ResNet-20 on Ultra96 FPGA board
Show how to use Tensil’s open-source accelerator and Xilinx PYNQ to run ResNet-20 model on Avnet Ultra96 development board.
FIR filters on FPGA
Design, test and deploy various FIR filters on FPGA with the MYIR development board
Minized - Vitis Accelerated with PMOD SD-CARD
Minized - Vitis Accelerated platform with PMOD SD-CARD adapter
Petalinux Build for ADRV9009 + ZCU102 Custom Design
Step-by-step guide to build a custom PetaLinux image for the ADRV9009 + ZCU102 after modifying the HDL reference design by Analog Devices.
One of the coolest FPGA Technologies: AMDs DFX
Swapping hardware within microseconds: Possible when using FPGAs from AMD. The technique is called Dynamic Function Exchange.
Creating VEK280 10G PL Ethernet based Vitis Custom Platform
Creating Vitis custom base platform based on 10G PL Ethernet with 2024.1 tools for AMD Versal VEK280!
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Minized with PMOD-TFT LCD
Minized with PMOD-TFT LCD attached. The goal is to setup an SPI LCD in Verilog, so you could freely stream pixels into display!
Karp, Petalinux and Vitis-AI 2.0
This project explains how to install Vitis-AI 2.0 in Petalinux for Kria Autonomous Robotic Platform (Karp).
Empowering DUNE: AXI UARTLite using Petalinux 2022.2 in KRIA
In this tutorial, we provide the steps to create the hardware design to support the AXI UARTLite IP and interact with Petalinux 2022.2.
ASL Classification with Vitis-AI
This project is a Getting Started Guide for the ASL Classification that was presented in our Webinar series for ZUBoard.
Fix for Vitis Unified 2023.2 Launching into Blank Screen
This write-up walks through how to fix Vitis Unified IDE 2023.2 when it does nothing but launches into a blank screen in Ubuntu.
Vitis-AI DPU-TRD for 2024.x with VIVADO and Kria/MPSoC
This article is on general steps and methods for creating the Vitis AI enablement project with DPU design in 2024.x tool for Kria or MPSoC.
Preventing Bird Strike at Airport with KRIA KV260
Using the KV260 DPU Core & ML to Detect Birds in the Vicinity of Airport and Preventing Birds Strikes During Approach/ Landing / Take-off.
Pulse counter implemented in FPGA: hardware (VHDL) design
A fast counter that records time intervals between successive pulses such as detected photons in life sciences
XDF 2018 Mastering Programmable Logic with Xilinx SDSoC
Using proven flows for SDSoC, you will learn how to navigate SDSoC. Through hands-on labs, we will create a design for a provided platform.
Ultra96_robota
Use the camera and Vitis-AI platform to make a robot dog that can recognize people and cats.
Running Line detection app on Kria KV260(Xilinx DPU)
The idea behind this project is to use a trained neural network and try to optimise it to obtain the best hardware performance.
KV260 BIST Tutorial - Recreating with VIVADO/Vitis 2025.1
Recreating the BIST app on 2025.1 for Kria Vision Kit.
UARTLite FPGA to Linux: TTY Driver + Python Access via PCIe
Map FPGA UARTLite IP to Linux via PCIe XDMA. TTY interface and direct Python mmap access. Perfect for SDR and embedded applications!
How to use Zmod AWG DAC converter with the Eclypse Z7 FPGA
See how to use the Zmod AWG DAC converter with the Eclypse Z7 FPGA board using Vivado 2021.2.
From Code to Canvas: A SOM-Powered Robotic Writing Arm
Use the AMD Kria™ KR260 Robotics Starter Kit and ROS2 to power a robotic arm that autonomously writes text on a whiteboard.
Control GPIO from PYNQ and KR260
This project is part of a subproject for the AMD Pervasive AI Developer Contest. We are conducting tests with PYNQ and GPIO on KR260.
Matbi Watch on Zybo Z7 using Verilog HDL
Hello Matbi Watch :) Goal of this short project is making Watch on FPGA using Verilog HDL.
360° Object Detection Robot Car
This is the 360° Object Detection Robot Car featuring the KR260. This Robot was built for the AMD Pervasive AI Developer Contest.
Accelerated Sine Wave Application in Vitis 2021.2
This project walks through how to offload the generation of a sine wave into and FPGA's PL in an accelerated application in Vitis 2021.2
Updating the HW Design in an Accelerated App in Vitis 2023.2
This project walks through how to update the referenced hardware XSA file for an accelerated app in Vitis Unified 2023.2
Speech controlled robot with Tensil and Arty A7 - Part 1
Learn how to build a speech controlled robot with Tensil and Digilent Arty A7 FPGA board
Using eInk Displays with the ZynqberryZero
See how to control an eInk display with the UC8151D chipset from a ZynqberryZero running Adafruit's Circuit Python.
Empowering DUNE: Support for hard peripherals RPi+PMOD KRIA
In this tutorial, we provide the steps to create the hardware design to support the RPi and PMOD connectors in KRIA KR260
Radar based 3D Object Detection for mobile robot
Running Center-based Radar and Camera Fusion for 3D Object Detection on KV260
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Accelerated Visual Sense using RealSense Lidar
Creating spacially aware AI using a RealSense Camera and the Ultra96v2.
Using AXI DMA on Genode
Transferring data to/from the Zynq's FPGA is an essential ingredient for integrating custom accelerators.
Getting Tensil to run ResNet at 300 FPS on ZCU104
In this tutorial we will show how to optimize Tensil running ResNet20 trained on CIFAR for maximum performance.
Getting Started with AMD Spartan™ 7 FPGA in Vivado™ 2023.2
This project walks through how to create a hardware design for the SP701 for either no-OS or Linux applications in Vivado 2023.2.
Xilinx KV260 - JTag Fan Toggle using VIO
This is a basic tutorial on how to use the VIO to toggle the KV260 fan on and off using JTag
Zynqberry QSPI Boot Workaround for Vitis 2021.x and Later
This project walks through how to program the QSPI flash of Trenz Electronic's Zynqberry boards (TE0726 & TE0727) in Vitis 2021.x and later.
VHDL FIR Filter Vivado Simulation and Implementation
MATLAB coefficient generation → Vivado simulation → PYNQ-Z2 implementation with validated results
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